Since the invention of integrated circuits by Dr. Jack Kilby of Texas Instruments in early years, scientists and engineers have made numerous inventions and improvements in semiconductor devices and processes. In the past 50 years, the size of semiconductor devices has been significantly reduced, which leads to increasing processing speed and decreasing power consumption. To date, the development of semiconductors has generally followed Moore's Law, which roughly states that the number of transistors in dense integrated circuits doubles roughly every two years. Now, the semiconductor processes are being developed toward 20 nm or less, and some of the companies are embarking on the 14 nm process. Here, by way of providing only one reference, a silicon atom is about 0.2 nm, which means that the distance between two separate components manufactured by means of a 20 nm process is only about one hundred silicon atoms.
The manufacturing of semiconductor devices has therefore become increasingly challenging and advancing toward the physically possible limit. One of the recent developments in semiconductor technology has been the use of silicon germanium (SiGe) in semiconductor manufacturing. With the evolution of integrated circuit developments, functional densities (e.g., the number of interconnection line elements per chip area) are also generally increasing while the geometrical dimensions (i.e., the smallest element or line that can be produced using a process) are reduced. This size reduction process often can provide benefits in terms of increasing production efficiency and reducing associated costs; however, the reduction in size also results in a relatively high power loss value, for which low power loss elements such as complementary metal oxide semiconductor transistors (CMOSs) are used to solve. At present, most of the common integrated circuits are implemented based on a CMOS process.
A band-gap reference voltage source, as a common integrated circuit, is widely used in analog, digital and digital-analog hybrid circuits to provide a high-precision reference voltage for IC chips. In current CMOS integrated circuit processes, the band-gap reference voltage source is generally designed based on parasitic bipolar transistors. In order to increase the current gain of a parasitic bipolar transistor in a CMOS integrated process, a conventional process technique usually leaves a salicide block (SAB) layer of a certain width at an emitter of the transistor, so that a metal silicide and an electrode cannot be formed in the layer. FIG. 1A shows a schematic structural diagram of a parasitic bipolar transistor NPN transistor in the prior art. As shown in FIG. 1A, the semiconductor structure in the prior art has a semiconductor substrate 101, a shallow trench isolation structure 102 (STI), a P-type well 103, an N-type well 104, and a first active area 105A, a second active area 105B and a third active area 105C separated by the shallow trench isolation structure 102 and the P-type and N-type wells, and an emitter 106A and an emitter electrode 106B are formed over the first active area, a base 107A and a base electrode 107B are formed over the second active area, and a collector 108A and a collector electrode 108B are formed over the third active area. A portion, adjacent to the STI structure 102, on an upper surface of the emitter 106A leaves an SAB region 109, so that the metal silicide and the electrode cannot be formed in the region. With the prior art above, the current gain of the bipolar transistor can be increased to some extent. However, due to the limited area of the emitter region and the limited area available for the SAB region 109, the rate of increase in the current gain of the parasitic bipolar transistor has also been greatly limited.
Meanwhile, as shown in FIG. 1B, since a topographically uneven region 110 will be formed in a corner region between the emitter region 106A of the first active area 105A and the STI structure 102 by means of a front-layer multi-step cleaning and etching process, the topographically uneven region will affect the area of the SAB region 109 and the electric field distribution of the transistor, resulting in a relatively poor stability of the current gain of the bipolar transistor.
For these reasons, there is a need for a new transistor structure and a manufacturing method therefor, so that the bipolar transistor for the band-gap reference voltage source has a wider current gain range and a more stable current gain.